Program

08:00

Registration

08:15 - 08:25

Opening Remarks

08:30 - 09:10

Chrisma Jackson, Director, Cyber Security & Mission Computing; Chief Information Security Officer, Sandia National Laboratories

Cybersecurity Risk: Adapting to the Dynamics of an Evolving Enterprise Environment

09:15 - 09:55

J.R. Rao, IBM Fellow and CTO, Security Research at IBM Thomas J. Watson Research Center

Security Challenges for the AI and Hybrid Cloud Era

10:00 - 10:35

Jyotika Athavale, Director, Engineering Architecture at Synopsys, President, IEEE Computer Society

IEEE P2851: Addressing Functional Safety Interoperability within the Dependability Lifecycle

10:40 - 11:00

Coffee Break

11:00 - 11:35

Daniel Moghimi, Senior Research Scientist, Security & Privacy Research, Google

Microarchitectural attacks, deep vulnerabilities or deepfake?

11:40 - 12:15

Robert Aitken, Program Manager, Co-design and EDA, CHIPS for America, 
U.S. Department of Commerce 

Hardware Security Implications of Advanced Packaging and CHIPS for America

12:20 - 12:55

Jasper van Woudenberg, CTO, Riscure North America

Cloud-scaling pre-silicon side channel testing

13:00 - 14:20

Lunch

14:20 - 14:55

Cliff Wang, National Science Foundation

Update to NSF SaTC program

15:00 - 15:35

Jonathan Ring, Deputy Assistant National Cyber Director for Technology Security
Office of the National Cyber Director
Executive Office of the President

An ecosystem approach to Hardware Security

15:40 - 17:00

Panel Discussion

Rob Aitken, CHIPS for America
Sandhya Kooteshwara, IBM
Qioayan Yu, NSF
Jay Rekhi, NIST

Salsa and Chips: Is the Future of Hardware Security Salty or Sweet?

17:00 - 17:15

Concluding Remarks